Using Quartus II, or an equivalent VHDL entry program, develop the text file and
ID: 1813421 • Letter: U
Question
Using Quartus II, or an equivalent VHDL entry program, develop the text file and simulation for the shift register specified specified below. Verify the timing diagram shown below. Attach the .vhd and simulation files.
Specs
For a 10-bit serial-in/serial-out shift register, determine Data out for the Data in and clock waveforms shown below. Assume that the register is initially cleared.
Using Quartus II, or an equivalent VHDL entry program, develop the text file and simulation for the shift register specified below. Verify the timing diagram shown below. Attach the .vhd and simulation files. For a 10-bit serial-in/serial-out shift register, determine Data out for the Data in and clock waveforms shown below. Assume that the register is initially cleared.