Indicate whether the statement is true or false. 1. A .bdf file is a block diagr
ID: 1814490 • Letter: I
Question
Indicate whether the statement is true or false.
1. A .bdf file is a block diagram file.
2. A Primitive is a single copy of a component in a PLD file.
3. We can let the Quartus II software assign pin numbers to make the best use of the internal resources; unless specific pin locations are required.
4. A volatile device does not hold its programmed information if power to the device is removed.
5. The Altera ByteBlaster cable connects the PC parallel port to the Altera UP-2 development board.
Multiple Choice
Identify the choice that best completes the statement or answers the question.
____ 6. The CPLD Design Software by the Altera Corporation is called ____.
a.
Altera Design Package
c.
Schematic Capture
b.
Quartus II
d.
UP-2
____ 7. A PLD design file in the Altera software in which the digital design is entered as a schematic has the extension ____.
a.
.bdf
c.
.vhd
b.
.pld
d.
.max
____ 8. A single copy of a component in a PLD file is called a(n) ____.
a.
device
c.
primitive
b.
schematic
d.
instance
____ 9. Which of the following is a computer language used to model digital circuits and produce programming data for PLDs?
a.
VHSIC
c.
ASIC
b.
VHDL
d.
C
____ 10. Which device family is volatile?
a.
MAX7000S
c.
Quartus II
b.
FLEX10K
d.
VHDL
____ 11. If a CPLD device is not specified in the Quartus II software when a design is compiled ____.
a.
the software will choose an appropriate device
b.
an error will be issued, but compilation will continue
c.
compilation will stop until a device is named
d.
the largest and most complex device will be chosen
____ 12. The process of using design files to create files suitable for programming a device is called ____.
a.
simulation
c.
schematic entry
b.
compilation
d.
downloading
____ 13. The process of assigning internal PLD circuitry with input and output pins is ____.
a.
simulation
c.
fitting
b.
schematic entry
d.
targeting
____ 14. The file type in which a schematic design is entered in Quartus II is ____.
a.
Block Diagram File (.bdf)
c.
Hardware Definition File (.hdf)
b.
Schematic Entry File (.sef)
d.
Vector Waveform File (.vwf)
____ 15. A type of programming language used to design digital hardware is ____.
a.
High Level Language
c.
Assembly Language
b.
C++
d.
Hardware Description Language
____ 16. Binary files used to program nonvolatile devices have what file extension?
a.
.bdf
c.
.pof
b.
.sof
d.
.prg
Numeric Response
17. How many inputs can a PAL16L8 have?
Completion
Complete each statement.
18. Basic building blocks, such as logic gates, used in PLD design files are called ____________________.
19. The ability of a nonvolatile PLD to be programmed without removing it from a circuit board is called ___________________________________.
a.
Altera Design Package
c.
Schematic Capture
b.
Quartus II
d.
UP-2
Explanation / Answer
1. T
2. F
3. T
4. T
5. T
6. b)
7. a)
8. d)
9. b)
10. b)
11. a)
12. b)
13. c)
14. a)
15. d)
16. c)
17. 10
18. Primitives
19. In-system Programmability (ISP)