Create a D ip-op module (named dff from a cascade of two D latches and an invert
ID: 2081119 • Letter: C
Question
Create a D ip-op module (named dff from a cascade of two D latches and an inverter . The rst of these D latches is typically called the master while the other is called the slave. The truth table for the D ip-op, when the enable pin is high, is where the symbol indicates the rising edge of a clock pulse. If the enable pin is held low, nothing should change on the output of the D ip-op. The D ip-op module should follow the format
module dff(d, clk, enable, q, q_bar);
input d, clk, enable;
output reg q, q_bar;
{ ... put code here ... }
endmodule
Explanation / Answer
//d latch code
module D_latch(
input d1,clk1,en1,
output reg q1,q_bar1
);
always @(clk1 or en1)
begin
if(clk1==1 & en1==1)
begin
q1<=d1;
q_bar1<= ~q1;
end
else
begin
q1<=q1;
q_bar1<=q_bar1;
end
end
endmodule
//d flipflop using d_latch
module D_flipflop(
input d,clk,en,
output reg q,q_bar
);
wire q1,q1_bar;
D_latch d1(.d1(d),.clk1(clk),.en1(en),.q1(q1),.q_bar1(q1_bar));
D_latch d2(.d1(q1),.clk1(~clk),.en1(en),.q1(q),.q_bar1(q_bar));
endmodule