Create a VHDL module to map 8 slide switch (SW0-SW7) to 8 LEDs (LO0-LD7) on the
ID: 2248781 • Letter: C
Question
Create a VHDL module to map 8 slide switch (SW0-SW7) to 8 LEDs (LO0-LD7) on the NEXYS4 -DDR board. See Figure 1 for the mapping between the switched and the LEDs. The input slide switches should be defined in the module entity as a 8 bit std_logic vector swt, (7 downto 0), and the output LEDs as a std_logic_vector led, (7 downto 0). See below. The resistors are built-in to the board and do not need to be programmed. XC7A100TCSG324C-1 XC7A200TSBG484C-1 Figure 1: Slide switch to LED mapping Project entity: entity project2 is Port (swt: in STD_ LOGIC VECTOR (7 downto 0); led: out STD LOGIC VECTOR (7 downto 0)) end project2;Explanation / Answer
library ieee;
use ieee.std_logic_1164.all;
entity project2 is
port (swt: in STD_LOGIC_VECTOR (7 downto 0);
led: out STD_LOGIC_VECTOR (7 downto 0));
end project2;
architecture behavioral of project2 is
signal w1,w2,w3,w4:STD_LOGIC;
begin
w1<=not swt(0);
w2<=not swt(2);
w3<=swt(1) and w2;
w4<=swt(2) and swt(3);
led(0)<=w1;
led(1)<=w3;
led(2)<=w3 or w4;
led(3)<=w4;
led(4)<=swt(4);
led(5)<=swt(5);
led(6)<=swt(6);
led(7)<=swt(7);
end behavioral;