Please help with the question 49 . Please explain. Thank you. MOV AX,(10004TIhst
ID: 2266475 • Letter: P
Question
Please help with the question 49 . Please explain. Thank you.
MOV AX,(10004TIhstuctio ADD CX,AX ; Instruction 2 47. Describe the role of the NVIC in Cortex-M4 microprocessors and compare it with the role of the PIC 8259 in x86 processors family. 48. Compare between the technique used to manage subroutine calls in x86 and Cortex-M4 microprocessors In your comparison, describe which technique may be more efficient and why. 49. Describe the cache memory mapping technique used in each of the following designs? In each design, show the Cache Block (CB) location corresponding to the Main Memory Block (MMB) number 221. MAIN MEMORY CB-0 CB.1 CB-2 CB-3 CB-0 CB 1 CB-0 CB-1 SET 0 MMB-2 SET 1 Main Memory SET 2 CB- 1 Cache Memory CB-0 CB-1 CB-2 CB-3 MMB-1 MMB-2 MMB-63 MMB-31 MMB -64 MMB -32 CB -1 MMe.511 (b) ) ca-m ] t.MMB-n (c) 0. Describe how a timer in Pulse Width Modulation mode can be used as a Digital to Analog Converte (DAC)Explanation / Answer
a) is Direct mapped
each main memory is mapped to each block in cache memory and everything is in sequence . Is is mod-64 direct mapped.
for 221 MMB cache block will be 221 mod(64) =29
b) it is fully associative maping
in this any MMB can be placed to any CB .there is no sequence.
So 221 can be mapped to any CB.
c) It is 2 way set associative maping.
every 2 blocks in cache are united as 1 block in cache memory.
it is 32 set cahce block ,so for 221 MMB
cache set will be 221 mod(32) = 29 cachce set, cache block will be either 1 or 0 depend on replacement policy.