QUESTIONS Complete questions 1 to 8 1. This logic problem was solved faster and
ID: 2291756 • Letter: Q
Question
QUESTIONS Complete questions 1 to 8 1. This logic problem was solved faster and cheaper using an) a. Data selector b. AND-OR logic gate circuit c. NAND logic gate circuit 2. If a data input on a 74150 data selector were left disconnected, that input 3. To save switches, data inputs (74150) at a logical 0 are connected to 4. To save switches, data inputs (74150) at a logical 1 are connected to 5. Inside the single 74150 IC are would be considered to be at a logical -- (Refer to the manufac- turer's data manual.) a. 3 to 4 gates b. 10 to 15 gates c. 25 or more gates 6. Refer to Fig. 4-16. If the strobe or enable input is HIGH, the 74150 IC is be and output w will (disabled, (HIGH, Low) enabled) ?????????? 7. Refer to Fig. 4-16. The output W of the 74150 IC is a (negated, true) output. 8. Refer to Fig. 4-16. The 7404 inverter is used in this circuit to display the (negated, true) output at output indicator Y 8Explanation / Answer
Below are the answers respectively.
1) Correct option is a.
This is 16:1 multiplexer with 4 select lines. So with the help of multiplexer truth table solution will be faster.
Using a single IC instead of multiple gates reduces design time for schematic and PCB design as well as reduces testing time.
2) In logical terms it will be " Don't care". That is neither logic 0 nor Logic 1.
3) Anything required at Logic 0 can be connected to GROUND. Common connection to ground is easier in PCB and saves multiple switches.
4) Anything required at Logic 0 can be connected to VCC.Common connection to VCC/ supply is easier in PCB and saves multiple switches.
5) Answer is Option C ( 25 or more gates)
From the datasheet of 74150 IC, Logic diagram has 16 AND gates, 1 NOR gate and 8 NOT gates. So overall count is 25.
6) Enable pin is active low i.e when it is logic 0 IC will be enabled. So in case of Enable pin connected to Logic 1 output is tristate. Neither High or Low.
7) Bubble shown at the output pin W shows it is negated output.
8) True output will be displayed at the output of 7404 gate. Reason is W is already negated and with this NOT gate we are negating output of W. So 2 negation make the true output.