Coding with Verilog 1. Using your corrected block diagram of the 4-bit ALU from
ID: 3348928 • Letter: C
Question
Coding with Verilog
1. Using your corrected block diagram of the 4-bit ALU from the previous lab submission, create a top-level module with the following interface:
1 module four-bit.alu ( 3 output wire Overflow, //1-bit signal for overflow 5 /* ctr operation* output wire [3:0] Result , //4-bit output 2 0 input wire [3:0] opA, opB, //4-bit operands AND * ADD * AND * SUB 9 input wire [1:0] ctr 112-bit operation select 14 ECEN 248 Laboratory Exercise #6 15 Hint: Your code should instantiate the 4-bit, 2:1 MUX and the addition/subtraction unit which you have already designed.Explanation / Answer
module four_bit_alu(
output wire [3:0]result,
output wire overflow,
input wire [3:0]opA,opB,
input wire [1:0]ctrl);
reg [3:0]result;
always@(ctrl,opA,opB)
begin
case(ctrl)
2'b00: result=opA&opB;
2'b01: (result,overflow)=opA+opB;
2'b10: result=opA&opB;
2'b11: (result,overflow)=opA-opB;
end
endmodule