Question
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Classify each of the below situations as either a structural hazard, control hazard, or a data hazard: a) The memory shared by instruction fetches and data accesses in a von Neumann memory architecture. b) A conditional branch instruction in a RISC processor. c) An integer multiplier that takes two cycles to complete when all other arithmetic operations in a processor take one cycle. Assume that there are sufficient register read and write ports to support all the necessary reads and writes per cycle.
Explanation / Answer
a. data hazard
b. control hazard
c. structural hazard