Academic Integrity: tutoring, explanations, and feedback — we don’t complete graded work or submit on a student’s behalf.

Please answer if possible. Thank you Explain the function of the following regis

ID: 3575759 • Letter: P

Question

Please answer if possible. Thank you

Explain the function of the following registers in a CPU: PC, MAR, MBR, IR How does a computer "know" whether an operand in its instruction register is a literal or a reference to memory (i.e., an address)? Does a computer need Data Register? Draw a scheme for the following direct mapping of cache Data bus: 8 bit Main Memory Store: 256 Byte Cache Store: 32 Byte Block Size: 4 Byte Show the assigned bits for Tag, Block and Offset Given the same configuration in question For the following 2 addresses, separate the tag, block and offset: 11001101 10111001 Say at any given time, the tag table looks like the following For the address given above, determine whether it will generate a cache hit or cache miss?

Explanation / Answer

1.PC stands for Program counter.It can also be called or referred to as instruction pointer in various processors and it can also be refferred to as IAR which stands for Instruction Address Register.This Register is used to control the sequence of execution of instructions and this register holds the address of the next instruction that is to be executed.

MAR: MAR stands for Memory Address Register . This register stores the address of the memory from which data is fetched to the CPU or it contains the address to which data is to be sent and is stored .In general MAR contains the next memory address that is to be changed and so it acts as a parallel load register.This register has its output linked with the address bus.

MBR: MBR stands for Memory Buffer Register.It is also refeered to as Memory Data Register because it is used to store data temporarily which is to read from , or written to memory.This register in central processing unit is used for storing the data that is to transferred to and from the immediate access store. This register consists of the memory locations that are soecified by the Memory Address Register.

IR: IR stands for Instruction Register .This is an Non Programmable Register in the CPU.In this Register Instructions are stored after they are fetched from the processor.It can also be defines as the register that holds the instructiion that is currently being executed by the processor.

2.The computer knows if an operand in its instruction register is a literal or a reference to memory through the different addressing modes. There are different types of addressing modes.Instructions are the operations performed by CPU whereas the operands are the entities operated upon by the instruction.There are three parts of an instruction: they are Opcode , Operand and Adresses

Memory operands are the operands that are specified either by the name of a variable or by a register that contains the address of a variable. A variable name implies the address of a variable and instructs the computer to reference to the contents of memory at that address location. Memory references have the following syntax:

segment:offset(base, index, scale).

When the instruction registers doesnot have any address specified in them , then they can be referred to as a literal.

3.In a computer a register is some set of data holding places that are a part of a computers processing unit.A register can hold computer instruction , storage address or any data which can be a sequence of characters.The Memory data register or the memory buffer register or both one and the same

The MDR is a 2 way Register that is used when data is fetched from the memory and placed into MDR, it is written to go in one direction and when there is write instruction, the data to be written is placed into the MDR from another CPU register, which then puts or writes the data into the memory MDR's registers in central processing unit are used for storing the data that is to transferred to and from the immediate access store. This register consists of the memory locations that are specified by the Memory Address Register.

4.

Tag Index(block) offset

31-10 9-5 4-0