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Consider how two different processors would perform the following math calclation: 2*(W+X) W+Y R= Make a list of the instructions used by an accumulator architecture (AA) as well as a fetch-store architecture (FES) architecture, then use the following table to calculate the number of cycles required for each processor as well as the average cycles per instruction. AA FE.S Read/ Write 10 cycles 12 cycles Add/Subtract 5 cycles5 cycles Multiply/Divide 7 cycles 6 cycles

Explanation / Answer

Accumulator Architecture

LOAD W

ADD Y

STORE R

LOAD W

ADD X

MUL 2

DIV R

STORE R

Total Number of cycles = 4x10 + 2x5 + 2x7 =64

Average cycles per instruction = 64/8 =8

FES Architecture (Using 3-address)

LOAD R1 W

LOAD R2 X

LOAD R3 Y

ADD R4 <- R1 R2

ADD R5 <- R1 R3

MUL R6 <- R4 2

DIV R7 <- R6 R5

STORE R R7

Total cycles = 4x12 + 2x5 + 2x6 =70

Average cycles per instruction = 8.75

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