I need to draw a block diagram of a RAM unit with 64K words at 32 bit/word. I kn
ID: 3631360 • Letter: I
Question
I need to draw a block diagram of a RAM unit with 64K words at 32 bit/word.
I know there are 16 address lines, and 32 data lines. What I need help with is we have to label a block diagram of the RAM and label the lines that are required for the RAM integrated circuit as input, output, or input/output.
Anyone who could tell me exactly which are which is greatly thanked in advance. If there are any parts I am missing I would greatly appreciate the info as well. Thanks!
NOTE: my text refers to block diagram when showing the single chip and the lines coming and going. So the left side would have 16 address lines coming in and a read line a write line and a select line, then the right side would have the 32 data lines coming from it. What I need is to figure out which I label input, which I label output, and which I label I/O out of the adress, data, read, write, and select lines. The word lines throughout can be replaced with pins.
Explanation / Answer
The 16 address lines coming in on the left are the address inputs. Select line (CS or chip select) is the same as enable. The R/W line is I/O. The 32 lines coming out off the right are data output lines. For RAM, there should also be 32 data input lines on the left side. They might have omitted it for some unknown reason.