I provided the solution for this question. I want someone to explaint it to me .
ID: 3672521 • Letter: I
Question
I provided the solution for this question. I want someone to explaint it to me ... i have no idea what is going on .. like tell me how we get for example 3.28, 40.9 .. etc
I am confused i want a very detailed explaination ..
Average Memory Access Time = hit time + miss rate x miss penalty (miss penalty may be recursive)
Split I and D cache:
Average MAT_split = % instructions x (hit time + instruction miss rate x miss penalty) + % data x (hit time + data miss rate x miss penalty)
Which hierarchy has the lower average memory access time: a split 16 Kb instruction cache with a 16 Kb data cache, or a 32 Kb unified cache?
Use the following miss rates (misses per 1000 instructions):
Unified cache
8.16
44.0
63.0
40.9
Assume 36% of instructions are data transfers. Assume a hit takes 1 clock cycle, a miss takes 100 cycles, and a load or store hit on a unified cache requires 1 extra clock cycle to prevent a structural hazard.
Solution:
If 36% of the instructions are data transfers, what percentage of the memory access are instruction and what are data?
1/1.36 = 0.74 0.36/1.36 = 0.26
Miss rate = (misses / 1000 instructions) / 1000 ) / ( memory accesses / instruction )
Miss rate_16kbInst = (3.82 / 1000) / 1.0 = 0.004
[ because there is one memory access to fetch each instruction ]
Miss rate_16kbData = (40.9 / 1000) / 0.36 = 0.114 [ because 36% of instructions are data accesses ]
Miss rate_unified = (43.3 / 1000) / (1.00 + 0.36) = 0.0318 [ taking into account all accesses]
Average MAT_split = 74% x ( 1 + 0.004 x 200 ) + 26% x ( 1 + 0.114 x 200) = 1.332 + 6.188 = 7.52
Average MAT_combined = 74% x ( 1 + 0.0318 * 200 ) + 26% x ( 1 + 1 + 0.0318 * 200 ) = 5.446 + 2.174 = 7.62
Instruction cache Data cache Unified cache 8 KB8.16
44.0
63.0
16KB 3.8240.9
51.0 32 KB 1.36 38.4 43.3Explanation / Answer
ok, Firstly we must understand the question.
It was asking whether avergae memory access time is less for either 32kn unified cache or
combination of split 16kb( cache + data cache)
So we first calculate Average memory access time for instruction cache and data cache
Formula for miss rate:
-----------------------
MIss rate = (misses per 100 instructions / 1000)/ (memory access/instruction)
***** instructions = 1000 givenin question **********
(i)So for 16kb cache = (3.82/1000) / (1000/1000) = (3.82/1000)/1 = 0.004
(ii) miss rate for 16kb data = (40.9 / 1000) / 0.36 = 0.114 [ because 36% of instructions are data accesses ]
--------------------------------------------------------------------------------------------------------------------------------------------------
Now we calculate for 32kb unified cache
Memort access and memory instruction are calculated as follows:
Given 36% instructions are data transfers:
so memory access: 1/1.36 = 0.74
memory instruction: 0.35/1.36 = 0.26 [also we can calculate by 1-0.74 = 0.26]
Miss rate unified cache: (43.3/1000) / (1.00 + 0.36) = 0.0318
**************************************************************************************
So for split memory access time 16kb( instruction + data)
==> 74% x ( 1 + 0.004 x 200 ) + 26% x ( 1 + 0.114 x 200) = 1.332 + 6.188 = 7.52
****************************************************************************************
Then for unified memory access time 32kb
Average MAT_combined = 74% x ( 1 + 0.0318 * 200 ) + 26% x ( 1 + 1 + 0.0318 * 200 ) = 5.446 + 2.174 = 7.62
So split memory access time 16kb cache (7.52) is less than unified 32kb cache (7.62)