Part II. Answer the following Questions 1. In an asynchronous master-slave inter
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Question
Part II. Answer the following Questions 1. In an asynchronous master-slave interconnection bus what is the meaning of AS_H becoming asserted? a. Indicates the slave has placed data into the data bus during a read cycle b. Indicates the Master has placed valid data into the data bus c. indicates the address is valid and can be decoded by the Slave d. indicates the Master is ready to capture data and the Slave should place data into bus e. Indicates the Slave has placed data into the data bus 2. In an asynchronous master-slave interconnection bus what is the meaning of DS_H becoming asserted during a write cycle? a. Indicates the slave has captured data into the data bus during a write cycle b. Indicates the Master has placed valid data into the data bus c. indicates the address is valid and can be decoded by the Slave d. indicates the Master is ready to capture data and the Slave should place data into bus e. Indicates the Slave has placed data into the data bus 3. In an asynchronous master-slave interconnection bus what is the meaning of RDY_H becoming asserted during a read cycle? a. Indicates the slave has captured data into the data bus during a write cycle b. Indicates the Master has placed valid data into the data bus c. indicates the address from the master is valid and can be decoded by the Slave d. indicates the Master is ready to capture data and the Slave should place data into bus e. Indicates the Slave has placed data into the data bus 4. Which of the following statemens could you use to model a ROM or RAM memory in VHDL a. A Table statement b. An ARRAY statement c. An ALIAS statement d. A SIGNAL statement e. A PORT MAP statement 5. There are two roads which intersect, road-a and road-b To Coordinate traffic flow, there are to semaphores, one on each road that intersects. The Moore FSM that controls the semaphores has theExplanation / Answer
1.(c) indicates the address is valid and can be decoded by the slave.
2.(e) indicates the slave has placed data into the data bus.
3.(c) indicates the address fromthe master is valid and can be decoded by the slave.
4. (e) A PORT MAP statement.