Figure 2 shows an ASM chart that is to be realized by a sequential circuit using

Question

Figure 2 shows an ASM chart that is to be realized by a sequential circuit using D flip flops. It has five outputs labeled O1, O2, O3 ,O4, O5.

(a) Use a 1-hot code (each state identified by a unique bit) for the state assignment, with Y1 for state A, Y2 for state B, Y3 for state C and Y4 for state D. Write the minimal 2-level Boolean expressions for the state variables and each of the outputs.

(b) Translate the ASM chart of part (a) into a standard three part, synthesizable Verilog description of a state machine.

Explanation / Answer

TestSet: btfss S_PORT,S_BIT ; Is Set HI goto TestReset bsf Q_PORT,Q_BIT ; Yes, Set Q HI and /Q LO bcf N_PORT,N_BIT TestReset: btfss R_PORT,R_BIT ; Is Reset HI goto AllDone bcf Q_PORT,Q_BIT ; Yes set Q LO and /Q HI bsf N_PORT,N_BIT btfss CLK_PORT,CLK_BIT ; CLK pulse? goto AllDone clrw btfsc D_PORT,D_PIT ; Set WREG to all zeros or ones depending on D state movlw h'ff' xorwf Q_PORT,W ; Compare with current state andlw 1

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