For the following MIPS sequence consider the cases (a1 and a2) tabulated in prob
ID: 3807619 • Letter: F
Question
For the following MIPS sequence consider the cases (a1 and a2) tabulated in problem 2 and address the following sequence of instructions: lw $t0, 1000($s0) add $t1, $t0, $s1 beq $t1, $zero, doit a. The execution time of the sequence in a non-pipeline machine, b. The execution time if a pipelined scheme is used but considering also the delays due to data dependencies, and c. An approximation of the speedup obtained by the pipelined execution of the sequence of instructions. Give a short explanation about your results.Explanation / Answer
a)
In case of non pipelined machine there are 3 instructions and if we take the ideal case where beq meets in first instruction fetch there will be just 3 instructions in the pipeline.
There are 5 operations to be done. so in total it will take 15 clock cycles in non-pipelined processor.
b)
In case of pipeline processor there is a dependency between lw and add instruction because of $t0. The result of $t0 is used in add instruction. so we may need to add 3 nops considering no data forwarding in place.
so modified code will be
lw
nop
nop
nop
add
beq
to execute 5 instructions in the pipeline processor mips it will take 4+5 9 clock cycles.
in case of pipeline processor multiple instruction will be there in each stage of the pipeline. the first instruction will take 5 cycles to commit but after that each clock cycle a instruction will commit.
c)
The speed up will be of 15-9/15=6/15=40% compared to non pipelined processor.
In pipeline it will take 9 cycles.
non pipeline 15.