An enhancement NMOS transistor is Connected in the bias circuit of Fig. 5.52(c)
ID: 1833956 • Letter: A
Question
An enhancement NMOS transistor is Connected in the bias circuit of Fig. 5.52(c) with V G = 4 V and Rs = 2 k ohm. The transistor has V t = 1 V and k n = 2 m A /V2. What bias current results? If a transistor for which kn is 50% higher is used. What is the resulting percentage increase I ?Explanation / Answer
use Equation ,I = Kn(Vgs-Vt)^2 .Given Vt = 1,Kn = 2,Vg = 4 ans Vs = IRs = 2I(assuming I is in mA) now ,I = Kn(Vg-Vs-Vt)^2 = 2(4-2I-1)^2 solving this equation we get two values of I = 2mA or 1.125mA where 1.125mA should be taken because Vgs>Vt should be allowed which is not possible with I = 2mA. if Kn increases by half,then Kn will be 3mA/V^2.Similarly substituting the value of Kn in the above equation gives again two values of I = 1.898mA or 1.186mA .Again 1.186 should be taken because the other value would result in violation of Vgs>Vt. Increase in current = (1.186-1.125)/1.125 = 0.061 %increase in I is 6.1