I. Objectives To analyze a common-source JFET Amplifier comprising of a JFET, a
ID: 2248298 • Letter: I
Question
I. Objectives
To analyze a common-source JFET Amplifier comprising of a JFET, a capacitor, and a resistor.
To theoretically calculate and verify the circuit parameters.
To determine and verify the voltages ( ) with respect physical circuit layout and the circuit simulation.
To determine if the output voltage from a common-source amplifier is in-phase or out-of-phase with input waveforms.
To determine the voltage gain of the circuit.
II. Equipment and Parts List
Equipment:
PC or compatible
Function Generator
DMM (digital multimeter)
Variable DC power supply
Oscilloscope
Parts:
Qty.
Component
Tolerance Band
Wattage Rating, W
1
2N5458 JFET
1
1 k Resistor
gold
¼
1
4.7 K Resistor
gold
¼
1
470 K Resistor
gold
¼
2
100 nF Capacitor (0.1 F)
1
1.0 uF Capacitor
1
Proto Board
3
BNC to split ends cable
Hookup wires of different colors
Software: MultiSim
III. Procedure
Theoretical Analysis
Given the circuit in Figure 1,
Below is the procedure to find .
Based on the datasheet for 2N5454 JFET, IDSS = 3 mA and VGS(off) = -2 V. For the circuit:
Plug: IDSS = 3 mA and VGS(off) = -2 V into above equations:
3mA
3mA
.003
1
0.25
Since VGS must be between 0 and VGS(off)
Therefore VGS = -0.906 V
Calculate the DC parameters as listed in Table 1 according to the information given above, and enter the calculated values in Table 1 on the worksheet.
Voltages
Voltage (V)
Source Voltage (VS)
Gate Voltage (VG)
Drain Voltage (VD)
Calculated Voltage drop between source and drain (VDS) where VDS = VD - VS
Table 1
MultiSim Simulation
Enter the circuit as shown in Figure 1 using 2N5454 JFET in MultiSim. Set the DC source for a VDD of +12V. Connect the signal source Vin to a function generator with sine-wave mode selected. For now make sure the input voltage is set for zero. A typical MultiSim circuit is shown below.
Measure the DC voltages as listed in Table 1 above and enter the measured values in Table 2 on the worksheet.
Connect Vin to one channel of the oscilloscope and Vout to the second channel of the oscilloscope. Adjust the signal source at Vin to be a signal of 1 kHz at 0.5 VPP. Capture the input and output waveforms using print screen and insert them on the worksheet with proper caption. A typical scope display is shown below.
Answer the following questions on the worksheet.
What is the peak-to-peak voltage of Vin on the oscilloscope display?
What is the peak-to-peak voltage of Vout on oscilloscope display?
Are the Vin and Vout waveforms in phase or out of phase?
What is the calculated voltage gain (AV) of this circuit?
Can the voltage gain of a common-source amplifier be greater than 1? Why?
Reduce the setting of the DC source (VDD) to +9V as shown below. Note that if the peak of the waveform at Vout is clipped; reduce the input signal level until the clipping effect is no longer apparent. Capture the input and output waveforms using print screen and insert it on the worksheet with proper caption.
Answer the following questions on the worksheet.
What is the peak-to-peak voltage of Vin on the oscilloscope display?
What is the peak-to-peak voltage of Vout on the oscilloscope display?
What is the calculated voltage gain (AV) of this circuit?
Does decreasing the value of VDD increase the voltage gain?
Experimental Breadboard Construction
Construct the circuit on breadboard in Figure 1. You may only find 2N5458 in your part packet. The pinouts in shown below.
Take a picture of the breadboard circuit that you construct and paste it on the worksheet. A typical circuit construction is shown below.
Set the DC source for a VDD of +12V. Connect the signal source Vin to a function generator with sine-wave mode selected. For now, make sure the output voltage is set to zero.
Measure the DC voltages as listed in Table 1 above and enter the measured values in Table 3 on the worksheet. A typical meter measurement is shown below.
Connect Vin to one channel of the oscilloscope and Vout to the second channel of the oscilloscope. Adjust the signal source at Vin to be a signal of 1 kHz at 0.5 VPP. Capture the input and output waveforms using print screen or take a picture and paste them on the worksheet with proper caption. A typical scope display is shown below.
Answer the following questions on the worksheet.
What is the peak-to-peak voltage of Vin on the oscilloscope display?
What is the peak-to-peak voltage of Vout on the oscilloscope display?
Are the Vin and Vout waveforms in phase or out of phase?
What is the calculated voltage gain (AV) of this circuit?
Can the voltage gain of a common-source amplifier be greater than 1? Why?
a. What is the peak-to-peak voltage of Vin on the oscilloscope display?
b. What is the peak-to-peak voltage of Vout on the oscilloscope display?
c. What is the calculated voltage gain (AV) of this circuit?
d. Does decreasing the value of VDD increase the voltage gain?
D. Results Analysis
1. Complete the tables containing the calculated, simulation, and constructed circuit measurement results obtained for the input and output signals.
2. Compare the theoretical, simulation, and hardware circuit results, and enter your comments on the worksheet.
IV. Troubleshooting
Describe any problems encountered and how those problems were solved.
V. Questions
Please provide the answer to the following questions on the worksheet.
Did your theoretical calculations closely match the results obtained from the MultiSim simulation? (Yes/ No)
Comments:
Did your theoretical calculations closely match the results obtained from the constructed circuit on breadboard? (Yes/ No)
Comments:
Did your results obtained from the MultiSim simulation closely match the results obtained from the constructed circuit on breadboard? (Yes/ No)
Qty.
Component
Tolerance Band
Wattage Rating, W
1
2N5458 JFET
1
1 k Resistor
gold
¼
1
4.7 K Resistor
gold
¼
1
470 K Resistor
gold
¼
2
100 nF Capacitor (0.1 F)
1
1.0 uF Capacitor
1
Proto Board
3
BNC to split ends cable
Hookup wires of different colors
VDD xSc1 12V be Trc R3 4.7k XFG1 C3 100nF Vout Q1A C2 Fin 100nF 2N5454 R1 470k R2 Figure 1Explanation / Answer
clc
clear all
A=[4 1 2 -3; -3 3 -1 4; -1 2 5 1; 5 4 3 -1];
b=[-16; 20; -4; -10];
[L,U,P]=lu(A);
%verifying PA=LU
PA=P*A
LU=L*U
disp('PA-LU=')
PA-LU
% finding solution with LUP method
LY=P*b;
Y=inv(L)*LY;
xlu=inv(U)*Y
%finding solution with regular inversion
x=inv(A)*b;
%verifying the results
disp('norm(xlu-x)')
norm(xlu-x)