Please solve both parts and post VHDL code for each one below. Thanks! A) The Mu
ID: 2248804 • Letter: P
Question
Please solve both parts and post VHDL code for each one below. Thanks!
A) The Multiplicand block is a 64-bit left-shift register. The register should be controlled by load signal (not pictured) which allows a 32-bit value to be loaded into the bottom half of the 64-bit register with the upper half set to all o. Using VHDL create the Multiplicand 64-bit left-shift register w/load and reset signals. B) The Multiplier block is a 32-bit right-shift register. The register should be controlled by load signal which allows a new 32-bit value to be loaded into the register. Using VHDL create the Multiplier 32- bit right-shift register w/load and reset signals.Explanation / Answer
--2.multiplier code