I will really appreicate the help. Thanks! These are bonus questions that I am a

Question

I will really appreicate the help. Thanks! These are bonus questions that I am allowed to put on a cheat sheet.

21.How is the MIPS pipeline different from the multicycle design? 22.Name the five parts of the multicycle implementation (which have the same names as the five sections of the MIPS R-2000 pipeline 23. Why are intermediate results registers required in the MIPS pipeline implementation? 24.What are the acronyms for the interfaces between the pipeline sections? 25. When is the ALU bypass bus used? 26.What is a data hazard in the MIPS pipeline?

Explanation / Answer

21.MIPS pipeline has low CPI ( cycle per instrunctio) close to 1 where as multi cycle has very high CPI .

Also in MIPS pipeline,MIPS is high and clock period is shorter with respect to multi cycle.

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