Please assuming that the experiment is based on Basys 2 FPGA board. ATTENTION:DO
ID: 2290987 • Letter: P
Question
Please assuming that the experiment is based on Basys 2 FPGA board. ATTENTION:DO NOT NEED SOLUTION FOR THE FIRST PART OF THE PICTURE, ONLY NEED THE ANSWERS FOR THE QUESTIONS FOR THE SECOND PART Calculate the mod number and the number of flip-flops required to make a frequency divider that takes a 50 MHz as its clock input and outputs the following approximate frequencies: 1.5 Hz, 0.75 Hz and 0.375 Hz. Hint: remember that for a natural counter (or divide-by-M frequency divider), M 2Nso N log.(M) Design a synchronous mod-4 up/down counter (excitation table and excitation logic expressions) QUESTIONS 1. If you needed a 100 MHz clock instead of 50 MHz, how could you modify the board to double its clock frequency? What is the Vcc voltage on the Basys 2 board? In addition to the switches, buttons, LEDs, and 7-Segment displays, how many other inputs and outputs are available on the top connectors JA, JB, JC and JD? Calculate the frequency of each (all) of the outputs of your frequency divider (not just the 3 you used) 2. 3. 4.Explanation / Answer
1) The board has a configurable oscillator that produces 25MHz, 50MHz, or 100 MHz based on the position of the frequency slect jumper at JP4.So, the jumper can be placed on the 100MHz output pin.
2)The board can be powered from a USB cable , and also a battery connector is also provided to use external power supplies. To power the board using a battery or other external source we can attach a 3.5V-5.5V battery or other power source to the battery connector. The input power routed through a power switch to LTC 3545 voltage regulator, which produces the 3.3V, main supply for the board. So, the power supply voltage Vcc on the board is 3.3 Volts.
3) Top connectors: The board has four 6-pin periheral module connectors. Each connector has power supply Vdd, ground (GND), and four unique FPGA signals.The connectors JA, JB, JC & JD has Pmod ports and power supply pins(Vdd and gnd). Pmod ports are economical analog and digtal I/O modules that can perform A/D and D/A conversion, , driving motors, sensor inputs , and many other important features.
4) Frequency divider:
(i) If the clock frequency is 100MHz, the frequency divider genearates signals with frequncies 3.03 Hz, 1.51Hz, and 0.75 Hz.
(i) If the clock frequency is 25MHz, the frequency divider genearates signals with frequncies 0.76 Hz, 0.38Hz, and 0.19 Hz.