Performance. Consider a non-pipelined single-issue processor P. The instructions
ID: 3528313 • Letter: P
Question
Performance. Consider a non-pipelined single-issue processor P. The instructions of P can be classified into 4 types: integer, memory, branch and floating-point. You are asked to evaluate the performance by running a benchmark program K. The instructions breakdown for program K is shown in the table below. What is the CPI number for K? Please derive your answer. Assume that a set of design optimizations can reduce floating-point instruction latency to 2 cycles and branch instruction latency to 1 cycle. What is the overall speedup for benchmark program K in a new version of processor P after these design optimizations are adopted? Please derive your answer.Explanation / Answer
8.1).Total cycles for k are;
1000*1 + 400 *2 + 800*2 +200*7 = 4800;
Total instruction for K = 2400;
Now cycles per instruction = 4800/2400 = 2;
8.2). Now after optimization;
Total cycles for k are;
1000*1 + 400 *2 + 800*1 +200*2 = 3000;
Now cycles per instruction = 3000/2400 = 1.25;
Overall speedup is now that the improved processor is processing the program for only 1.25 cycles per instruction