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QUESTIONS Short Answer format for floating-point representation. 1. x86 processo

ID: 3594661 • Letter: Q

Question

QUESTIONS Short Answer format for floating-point representation. 1. x86 processors use 2. In floating point representation, the digits to the left and right of the point are known as the 3. Exponent storage adds a to an exponent because they are stored as integers 4. Floats are which means the binary point is shifted until a single1" is left of the point 5. The FPU performs arithmetic using 6. 7. format. is when a floating-point resuit is computed beyond the vald range The FPU co-processor is denoted as 8. The FPU Control Register dedicates two bits tor rounding methods, meaning possible rounding methods exist. 9. The FPU register stack has 10. Streaming SIMD Extensions allow for 11. MMX technology introduced 12. Advanced Vector Extensions have added 13. AVXallows for 14. The hardware implementation of destination at (b 15. The SIMD movss" instruction indicates the instruction is the registers that are bits wide - instructions to operate on data. datatypes and registers operand instructions. c) is known as version.

Explanation / Answer

1. x86 processors use little endian storage format for floating point representation.

2. In floating point representation, the digits to the left and the right of the ‘point’ are known as the integer part and fraction part respectively.

3. Exponent storage adds a bias to an exponent because they are stored unsigned integers.

4. Floats are single precision, which means the binary point is shifted until a single “1” is left of the point.

5. The FPU performs arithmetic using single precision format.

6. overflow is when a floating point result in computed beyond the valid range.

7. The FPU co-processor is denoted as overflow/underflow.

8. The FPU Control Register dedicates two bits for Enable/Disable rounding methods, meaning possible rounding methods exist.

9. The FPU register stack has 8 registers that are 80 bits wide.

10. Streaming SIMD Extensions allow for single instructions operate on multiple data.

11. MMX technology introduced 4 datatypes. (Packed byte, Packed word, Packed doubleword, Quadword)

12. Advanced Vector Extensions have added XMM (128-bit) and YMM (256-bit) register.

13. AVX allows for three operand instructions.