Please write the code using VHDL with suffecient comments. Design a simple proce
ID: 3600533 • Letter: P
Question
Please write the code using VHDL with suffecient comments.
Design a simple processor with 4 4-bit registers and a 16- word memory with 8-bit words. The processor should be able to pick up data from a switch register which you operate manuallyo set up a bit pattern and display the outputs through LEDs. It can perform all the basic operations- add, subtract, multiply, and divide as well as data movement operations. However, due to limitations on the size of your instruction multiply or divide instructions in your instruction repertoire. Even if you could, you will not do that in this primitive design. Hence, you will design only a basic set of instructions and demonstrate with the help of those instructions how you may perform those instructions. Your complete design will result in a system that executes all those instructions step by step. For reporting the project, you will follow the guidelines given in the last class. s, you may not have the luxury of having a separateExplanation / Answer
Library ieee;
Use ieee.std_logic_1164.all;
Use ieee.std_logic_unsigned.all;
Use ieee.std_logic_arith.all;
Entity mux_disp1 is
Port (clk:in std_logic ---4MHz
Rst: in std_logic;
seg: out std_logic_vector(6 downto 0)
base: out std_logic_vector(3 downto 0));
end mux_disp1;
architecture mux_disp_arch1 of mux_disp1 is
signal count : std_logic_vector(25 downto 0);
signal base_cnt: std_logic_vector(1 downto 0);
signal seg_cnt: std_logic_vector(3 downto 0);
begin
process(clk,rst)
begin
if rst = '1' then
count<=(others=>'0');
elsif
clk='1' and clk'event then
count<= + '1';
end if;
end process;
base_cnt<=count(12 downto11);
seg_cnt<=count(25 downto 22);
Base<= "1110" when base_cnt="00" else
"1101" when base_cnt="01" else
"1011" when base_cnt="10" else
"0111" when base_cnt="11" else
"1111";
Seg<= "0111111" when seg_cnt="0000" else ---0
"0000110" when seg_cnt="0001" else ---1
"1011011" when seg_cnt="0010" else ---2
"1001111" when seg_cnt="0011" else ---3
"1100110" when seg_cnt="0100" else ---4
"1101101" when seg_cnt="0101" else ---5
"1111101" when seg_cnt="0110" else ---6
"0000111" when seg_cnt="0111" else ---7
"1111111" when seg_cnt="1000" else ---8
"1100111" when seg_cnt="1001" else ---9
"1110111" when seg_cnt="1010" else ---A
"1111100" when seg_cnt="1011" else ---B
"0111001" when seg_cnt="1100" else ---C
"1011110" when seg_cnt="1101" else ---D
"1111001" when seg_cnt="1110" else ---E
"1110001" when seg_cnt="0000" else ---F
"0000000";
End mux_disp_arch1;