Follow this link to find the circuit diagram and pin map of 8-to-1 MUX, 74LS151
ID: 3607444 • Letter: F
Question
Follow this link to find the circuit diagram and pin map of 8-to-1 MUX, 74LS151 (answer question 3 using the pin map, figure (b) on the lower right side):
https://cse.sc.edu/~huangct/CSCE211HF17/74x151.pdf
Follow this link to find Decoder and MUX instructions:
Follow this link to find the circuit diagram and pin map of 3-to-8 Decoder, 74LS138 (answer question 4 using the pin map, figure (b) on the right side):
https://cse.sc.edu/~huangct/CSCE211HF17/74x138.pdf
_________________________________________
1. (0.5 points) Use an 8-to-1 MUX (74LS151 above) to implement f(W, X, Y, Z) = m(1, 4, 5, 7, 9, 10, 12, 15). Pair rows (0-1, 2-3, ...) so that MUX inputs are 0, 1, Z, or Z'. Show chip enabled, connect variables to address lines, and label function output.
2. (0.5 points) Use a 3-to-8 DECODER (74LS138 above) and an external gate AND or NAND with the fewest inputs to implement f(x, y, z) = m(0, 3, 5, 6, 7). (Hint: AND the Maxterms, NAND the minterms.) Show chip enabled, connect variables to address lines, and label the function output.
3.(0.7 points) For the following set of functions, design a system (i) using a ROM; (ii) using a PAL; (iii) following the instruction of Problem 16.c from Section 5.10 with the decoder as given in that problem.
F(A, B, C, D) = A'BD + B'C
G(A, B, C, D) = AB'C' + A'C'D + BCD'
Explanation / Answer
Hi,
Please provide the query details in a text or image format not in link so that we can able to view and answer immediately. Hope you understand. Thank you.