In the embedded market, where cost is crucial, processors sometimes implement fl
ID: 3663586 • Letter: I
Question
In the embedded market, where cost is crucial, processors sometimes implement floating point only in software. We are interested in two implementations of a computer, one with and one without special floating-point hardware. Consider a program, P, with the following mix of operations: Floating-point multiply: 15% Floating-point add: 20% Floating-point divide: 10% Integer instructions: 55% Compute MFP (computer with floating point) has floating-point hardware and can therefore implement the floating-point operations directly. It re- quires the following number of clock cycles for each instruction class: Floating-point multiply: 6 Floating-point add: 4 Floating-point divide: 20 Integer instructions: 2 Computer MNFP (computer with no floating point) has no floating-point hardware and so must emulate the floating-point operations using integer instructions. The integer instructions all take 2 clock cycles. The number of integer instructions needed to implement each of the floating-point operations is as follows: Floating-point multiply: 30 Floating-point add: 20 Floating-point divide: 50 Both computers have a clock rate of 1000 MHz. Find the native MIPS ratings for both computers. If the computer MFP in Exercise needs 300 million instructions for this program, how many integer instructions does the computer MNFP require for the same program? Assuming the instruction counts from Part (b), what is the execution time (in seconds) for the program in Exercise run on MFP and MNFP?Explanation / Answer
given:
floating point multiply = 15%
floating point add = 20%
floating point divide = 10%
intiger operation = 55%
MFP:
floating point multiply = 6 clock cycles
floating point add = 4 clock cycles
floating point divide = 20 clock cycles
intiger operation = 2 clock cycles
MNFP:
floating point multiply = 30 integer instructions
floating point add = 20 integer instructions
floating point divide = 50 integer instructions
integer instructions = 2 clock cycles
a)
MFP:
number of clock cycles required for one instruction on average for MFP
= 0.15*6 + 0.2*4 + 0.1*20 + 0.55*2
= 0.9 + 0.8 + 2 + 1.1
= 4.8 clock cycles
MIPS = numbers of clock cycles per second (MHz) / clock cycles per instruction = 1000 / 4.8 = 208.33
MNFP:
number of intiger instructions required on average per one instruction = 0.15*30 + 0.2*20 + 0.1*50 + 0.55*1
= 4.5 + 4 + 5 + 0.55 = 14.05
number of clock cycles required on average for one instruction = 14.05 * 2 = 28.1
MIPS = number of clock cycles per second (in Mhz) / number of clock cycles per instruction = 1000 / 28.1 = 35.5872
b)
given
number of instructions = 300 million
number of intiger instructions required on average per one instruction = 0.15*30 + 0.2*20 + 0.1*50 + 0.55*1
= 4.5 + 4 + 5 + 0.55 = 14.05
number of integer instructions required for 300 million instructions = 300 * 14.05 = 4215 million
execution time for MFP = number of instructions in million / MIPS = 300 / 208.33 = 1.44 sec
execetion time for MNFP = number of instructions in million / MIPS = 300 / 35.5872 = 8.43 sec