Topic: target addressing example assembly hey guys so i need help filling this o
ID: 3670382 • Letter: T
Question
Topic: target addressing example assembly
hey guys so i need help filling this out. I dont understand the concept of jumping and branching in assemply, but i dont understand how this table is filled out. if someone can please help, that would be great! thanks
Target Addressing Example Loop code from earlier example Assume Loop at location 80000 Loop: s11 sti. ss3. 2 80000 add Stl, Stl. Ss6 80004 lw St0, 0(Stl) 80008 bne St0, Ss5. Exit 80012 addi Ss3, Ss3. 180016 80020 80024 Exit: Solution 0119 41 Loop : s11 Stl. Ss3. 2 80000 add Stl, St1, Ss6 80004 0 9 229 032 1wSt0,0(St1) 80008| 35| 9|8 bne Sto, Ss5. Exit 80012521 addi Ss3, Ss3. 180016 8 9 19 80020 2 20000 Exit: 80024Explanation / Answer
1. Branch to a labeled labeled instruction instruction if a condition condition is true – Otherwise, continue seq y uentially.
2. beq rs, rt, L1 – if (rs == rt) branch to instruction labeled L1 • bne rs, rt, L1 – if (rs != rt) branch to instruction instruction labeled labeled L1.
3. L1 – unconditional unconditional jump to instruction instruction labeled labeled L1
Signed comparison: comparison: slt, slti
Unsigned comparison: sltu, sltui • Example – $s0 = 1111 1111 1111 1111 1111 1111 1111 1111 – $s1 = 0000 0000 0000 0000 0000 0000 0000 0001 – slt $t0, $s0, $s1 # signed
–1 < +1 $t0 = 1 – sltu $t0, $s0, $s1 # unsigned
+4,294,967,295 > +1 $t0 = 0
Branch instructions specify – Opcode, two registers registers, target address address
Most branch targets are near branch – Forward or bk d ac ward op rs rt constant constant or address address 6 bits 5 bits 5 bits 16 bits PCrelative addressing addressing Target address = PC + offset × 4 PC al d rea y i d ncremented by 4 by this time
Technical term for autoincrementation of PC is “delayed branch”
By default in SPIM “delayed branch” is not checked. To see you SPIM settings look at simulator settings
You can also check it by loading code to SPIM to check main : bne $s0, $s0, main
If branch target is too far to encode with 16 bit offset, assembler rewrites the code
beq $s0,$s1, L1 bne $s0,$s1, L2 j L1
Memory addressing modes Address in register register Address = Rbase + displacement Address = Rbase + 2scale × Rindex (scale = 0, 1, 2, or 3) Address = Rb + 2scale Address R × Ri d + displacement base + 2 Rind