Pipelining. Given a cpu running at 300 MHz, assume there are no read competition
ID: 3709943 • Letter: P
Question
Pipelining. Given a cpu running at 300 MHz, assume there are no read competition between each stage of instruction completion Design uses a 4 stage fetch/execute and clock for each stage listed Opcode fetch 1 cycle, decode 1 cycle, Operand fetch - 3 cycles, execute 5 cycles Pay attention to CPU clock speed. And show units of A. Give the time in clock/cycles to execute 1 instruction. measurement. B. Give number of instructions per second if NON-pipelined C. Give number of instructions per second if pipelined. D. Give number of instructions per second if the e xecution step is super-scalar.Explanation / Answer
As per your requirement the below one is solution please follow it step by step
A. We have 4 stages:
Opcode fetch - 1 cycle
decode - 1 cycle
Operand fetch - 3 cycles
execute - 5 cycles
Therefore to execute one instruction we need = 1 + 1 + 3 + 5 = 10 cycles.
Now CPU is running in 300Mhz
i.e 300 x 106 cycles takes 1 second to run.
Therefore 1 cycle will take 1/(300 x 106) second.
Therefore time to execute 1 instruction = 10 * 1/(300 x 106) second = 1/(30 x 106) = 1/30 microsecond = 0.033 microsecond.
B. If we use NON-PIPELINED then every instruction will run for 10 cycles as part A.
Like above in part A 10 cycles/1 instruction will need time = 1/(30 x 106) second
Therefore in 1/(30 x 106) second number of instructions executed = 1
Therefore in 1 second number of instructions executed = 30 x 106
Therefore 30 x 106 instructions per second if NON-PIPELINED.
C. Now in PIPELINED each instruction takes time = (the stage which is taking the maximum time)
Here execute phase is taking the maximum time i.e 5 cycles.
Therefore 1 instruction will take 5 cycles in PIPELINED.
Now as part A 5 cycles will take = 5/(300 x 106) = 1/(60 x 106) second
Therefore in 1/(60 x 106) second number of instructions executed = 1
Therefore in 1 second number of instructions executed = 60 x 106
Therefore 60 x 106 instructions per second if PIPELINED.
D. If the execution step is super-scalar then it will not take 5 clock cycles but only one clock cycle.
Now the stage which takes maximum time is Operand fetch i.e 3 cycles.
Therefore 1 instruction will take 3 cycles in superscalar PIPELINED.
Now as part A 3 cycles will take = 3/(300 x 106) = 1/(100 x 106) second
Therefore in 1/(100 x 106) second number of instructions executed = 1
Therefore in 1 second number of instructions executed = 100 x 106
Therefore 108 instructions per second if superscalar PIPELINED.