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In Computer Organization and Design 5th edition, question 5.3 on page 485 reads:

ID: 3771606 • Letter: I

Question

In Computer Organization and Design 5th edition, question 5.3 on page 485 reads:

For a direct mapped cache design with a 32-bit address, the following bits are used to access the cache.

On question 5.3.4, you are asked this:

Starting from power on, the following byte-addressed cache references are recorded.

The way I've been figuring out the index is by ignoring the first five bits of the binary representation of the byte-adddressed references, so for example, 16 would read like so.

0000 0000 0000 0000 0000 0000 0001 0000

Meaning the offset would be the first five bits, and the index would be the next five bits. So in this case, the index would be zero. However, the solutions manual is telling me that the index is one, and further questions lead me to believe these binary addresses have been bit shifted to the left once. 132, for example, is represented in binary like so.

0000 0000 0000 0000 0000 0000 1000 0100

Which would mean the index is four, but the solutions manual states that the index is eight.

I appologize if this seems a bit simple, but I'm having a lot of trouble figuring out where I'm going wrong here.

Thanks.

Tag Index Offset 31-10 9-5 4-0

Explanation / Answer

index is 4 not 8