May someone explain to me the highlighted portion of this paragraph? Also, I am
ID: 3808596 • Letter: M
Question
May someone explain to me the highlighted portion of this paragraph? Also, I am visualizing a signal as a wire, and a bus as a cable which contains all these signals, and that some of the signals are listed here in this paragraph.. Am I right? Feedback pls guys! I am quite bad with computers - simple ideas and such are welcome,
Thanks much!
9 A Simple Computer Design: The HP 3 A traditional digital computer consists of three main units, the processor or central processing unit (CPU), the memory that stores program instructions and data, and the input/output hardware that communicates to other devices. As seen in Figure 9.1, these units are connected by a collection of parallel digital signals called a bus. Typically, signals on the bus include the memory address, memory data, and bus status. Bus status signals indicate the current bus operation, memory read, memory write, or input/output operation. Processor Memory Input/ouput PC IR AC Address Bus MAR Data Bus MDR ALU Control Unit Figure 9.1 Architecture of a Simple Computer System.Explanation / Answer
The computer bus is a bunch of parallel wires connecting a lot of components together. These components can be the processor, memory or I/O. The bus is necessary because we sometimes need to move data from one peripheral to another. For example, we need to load a word from the Memory to MAR or some data into MDR etc.
There are two prevalent types of bus inside a system namely Address Bus and Data Bus. By going by their name, it might be clear that the data bus operates between the data pins of a processor, memory and even the I/O. Similarly, the address bus operates between all the address pins in the system.
Now comes the role of Bus Status Signals. There are a lot of scenarios when there is some data or an address on a bus which can be leaked between 4-5 components because of physical connections but is only intended to travel from one component to another. The status signals keep track of this. For example, if the status is 1, the current operation is memory read and therefor other components should not receive the data. Or if the status is 3, the operation might be I/O. This means components not a part of this operation need not interfere the data.