CSCI 3211 Computer Architecture I Homework #5 1. Assume the structure of a Tag C
ID: 3870645 • Letter: C
Question
CSCI 3211 Computer Architecture I Homework #5 1. Assume the structure of a Tag Cache and Main Memory as the following: 010010010 0001101010 010101010 1111001010 110100101 1101001001 If the Direct Mapped Cache method is implemented, what is the structuer of Cache RAM? Assume the main memory is organized as the following, in which the represented data are stored in Chace RAMM. 2. 111101010 111011101 01010101 0001110101 111010101 11100011001 0100100011 | 1110110101 1110010101 What is the structure of Tag Cache with regard to Sector Mapped Cache such that t cache sectors. Consider a main memory system with 8Kbyes and 128 bytes block size organized in refill lines of 32 bytes each. What is the Cache Ram and Cache Tag size ofeach of the folwoing cache systems Two-Way set associative cache systenm Direct-Mapped Cache system tor Mapped Cache system when number of blocks of cache Ram is ¼ of the num ber of blocks main memory of Fall associative cache system when number of blocks of cache Ram is ¼ of the number of blocks of main memoryExplanation / Answer
Answer 3.
Memory Size = 8KB = 213
128 B BLOCK SIZE ORANIZED IN REFILL LINES OF 32B EACH.
That implies Cache block size = 128 B
Word Size = 32B
No of memory block = Memory Size/ Word size = 8K/32 = 256 = 28
No of cache block = Cache memory size/ Word size = 128/32 = 4 = 22
Cache offset = no of memory block/ no of cache block = 28 / 22 = 26
Two way set associative
No of set in set in 2- way set associative = cache offset /no of block in one set = 26/2 = 25= 32
Tag size = memory size /( word size *no of set) = 213/(32*32) = 23
So the cache structure is
Tag Bit Set Offset word offset
Direct mapped
Tag size = memory size /( word size *Cache offset) = 213/(32*26) = 22
So the cache structure is
Tag Bit cache Offset word offset
Sector mapped
let N = No of blocks of cache ram = 1/4 of the no of memory blocks = 28 / 4 = 26
Tag size = memory size /( word size *N) = 213/(32*26) = 22
So the cache structure is
Tag Bit cache Offset word offset
Full associative
Tag size = memory size /( word size ) = 213 / 25 = 28
So the cache structure is
Tag Bit word offset
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