Problem 5: Classitying MISSes (20 points Consider a 2-way set-associative 8B cac
ID: 3903032 • Letter: P
Question
Problem 5: Classitying MISSes (20 points Consider a 2-way set-associative 8B cache for an 8-bit system. Each block is 2 bytes and an LRU eviction policy is used. Given the following sequence of cache accesses, determine whether each access is a hit or a miss and then classify each of the misses as one of compulsory, capacity, or conflict Additionally, break down each address to show the tag in order to help see what is in the cache. Please follow the format of the first row (which is filled out for you), Conflict AddressTag 0x16 0xo3 0x14 0x34 0x15 0x26 0x35 0x27 0x06 0x01 0x09 Hit/MissCompulsory Capacity 0x5 MissExplanation / Answer
In the given proble, we have 8B cache. One block consists of 2 Bytes, so, there are total of 4 blocks in the cache. It is given that the memory is 2 way set associative, this means, each set consists of 2 blocks. So, there are 2 sets in the cache. Block offset will require 1 bit as there are 2 B in a block. Set number will require 1 bit as there are only two sets in the cache. Here is the structure of the address:
........................Tag(6 bits)...................................
from the above structure, we can determine the required tag field of the table. To decide wether it is a miss or hit, we will see if the given block is already present in the memory. When a block enters the memory for he first time, it is a compulsory miss. A miss said to be capacity miss if cache is full and there is no way to avoid the miss. A miss is conflict miss if it could have been avoided by not replacing this block earlier with some other block.
Here is the filled table:
........................Tag(6 bits)...................................
set number(1 bit) Block offset(1 bit)