Please show step by step. The shift-register in Figure 4 above has two control i

Question

Please show step by step.

The shift-register in Figure 4 above has two control inputs, SI and SO. If you wanted all four I input values (I-par) to be available at the four outputs (A_par) when the next CLK occurs, what must SI and SO be set to? Assume the above operation (question 6) is now complete and the. A_par output lines have the value 1011. Now the Mode control is set to 10(S1 =1 So=0 and LSB_in is a 1 while MSB_in is a 0. What happens at the next clock pulse? .and what is the new value of A_par? Counters have the ability to count up (or down) in binary. When the output of each flip-flop is used as the clock to the next flip-flop you will have a _ (?) _. ripple counter synchronous counter shift-counter ring counter

Explanation / Answer

6>

first one is parallel loading.

S1=1

S0=1

7>

as the operation would be left shift,

so lsb value would be in.

at A, value=0111

8>

ripple counter.

Related Questions

Navigate

• Browse (All)
• Browse P
• Subjects

---