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Design a 4-bit right shifter using only 2-to-1multiplexors . Inaddition to 4-bit

ID: 1830999 • Letter: D

Question

Design a 4-bit rightshifter using only 2-to-1multiplexors. Inaddition to 4-bit input to be shifted, you need to use 2-bitcontrol input, which determines the number of right shifts. Forexample, if your input is "0110" and control input is "10", youroutput must be "0001". You must submit thefollowing:

i. Draw a block diagram for the shifter,which shows how 2-to-1 multiplexors are connected (similar to onein the lecture),

ii. Write a structural verilog code for theshifter (label the wire in the block diagram and use them in yourverilog code) and simulate it.

moduleshifter_behav(in,s,out);

    input[3:0]in;
    input [1:0]s;
   
    output [3:0]out;
   
    always @(in,s) begin
        case(s)
           2'b00:out = in;  

          2'b01: begin
             out[3] = 1'b0;
             out[2] = in[3];
             out[1] = in[2];
             out[0] = in[1];
          end
           2'b10:begin
             out[3] = 1'b0;
             out[2] = 1'b0;
             out[1] = in[3];
             out[0] = in[2];
          end
           2'b11:begin
             out[3] = 1'b0;
             out[2] = 1'b0;
             out[1] = 1'b0;
             out[0] = in[3];
           end
           default out = 4'bxxxx;
          endcase
   end
endmodule

Explanation / Answer

just add reg [3:0] out; statement below output [3:0] out;statement. Then it should work.