Academic Integrity: tutoring, explanations, and feedback — we don’t complete graded work or submit on a student’s behalf.

Please help, In the book, Computer Organization and Design, for the problem 5.4.

ID: 3527008 • Letter: P

Question

Please help, In the book, Computer Organization and Design, for the problem 5.4.4, I am confused. The problem follows: Starting from power on, the following byte-addressed cache references are recorded. Address 0, 4, 16, 132, 232, 160, 1024, 30, 140, 3100, 180, 2180 It seems that the solution assumes an offset of 4 bits so the index starts at the 5th bit. I see how they determined the index was 4 bits since there are 12 entries, but there is no explanation of why the offset seems to be 4 bits. Thanks

Explanation / Answer

in byte-addressed cache references the block size= 4 bits, hence offset is 4