Please Explain to me :) a. T/FAll instructions in the MIPS architecture we discu
ID: 3595847 • Letter: P
Question
Please Explain to me :)
a. T/FAll instructions in the MIPS architecture we discussed in class were 32-bits wide b. T/FIf a given program compiles to fewer dynamic instructions on processor A than it does on processor B and has a lower CPI on processor A than on processor B, then it executes faster on processor A than on processor B. c. T/FHardware division can be performed by repeated subtractions, comparisons, and d. T/F Load instructions transfer the data from register to memory while store e. T/F It is not possible forloverflow to occur if a positive number is subtracted from a shifts. instructions transfer the data from memory to registers negative number. f.T/F After performing the division operation, the divisor and remainder must have the same sign.Explanation / Answer
a) MIPS ( million instructions per second ) is a REDUCED INSTRUCTION SET COMPUTER ( RISC ) INSTRUCTION SET ARCHITECHTURE .
The early MIPS architecture were 32 bit. But it doesn't stop there late 64 bit were added.
It depends what your class dealt with.
b) Let's say Procesor A be pA and Processor B be pB.
If a given program compiler to fewer instructions in pA than in pB it says that pA's instruction set is smaller than pB. So then pA takes less time to load instructinos than pB.
And if CPI ( clocks per instruction that is the time taken for instruction to get executed ) is less in pA than pB. So pA takes less time to execute instructions compared to pB.
From the above two cases pA takes less time to execute the program than pB.
So the statement is true that pA executes the program faster than pB.
c) Hardware division can be performed by repeated subtracions and comparisons and shifts.
let's say we have to calculate N/D
it can be calculated with repeated subtractions and comparisions. It is called Euclidian division .
The algorithm is as follows :
So the algorithm comprises of repeated subtractions and comparisions. So we can say hardware division is repeated subtractions and comparisions and shifts. True.
d) To "load" means to copy a value from memory at some memory address, to a register.
Store is the opposite operation of load. Where load copies a value from memory to a register, store copies a value from register to memory.
The given statement is given in a wrong way, so it is flase.
e) If 2 Two's Complement numbers are subtracted, and their signs are different, then overflow occurs if and only if the result has the same sign as the subtrahend.
Subtrahend:what is being subtracted
Minuhend:what it is being subtracted from
Overflow occurs if
So in this case overflow may occur, so the statement is false.
f) we can't say that after performing the division operation the divisor and the remainder must have the same sign.
example let -11 is divided by 5 which gives quotient -2 and remainder -1 ( 5 * (-2) - 1 )
example let -11 is divided by -5 which gives quotient 2 and remainder -1 ( (-5) * 2 - 1 )
In this both cases the sign of the remainder -1 is same as the sign of dividend -11.
so the statment is false.
/* hope this helps */
/* if any doubts ,please comment */
/* thank you*/