Consider an 8-bit system with 32 memory locations (numbered from 0 to 31) and 8
ID: 3808447 • Letter: C
Question
Consider an 8-bit system with 32 memory locations (numbered from 0 to 31) and 8 different instructions. Assume op code for "Load Accumulator" instruction is 510 and for "Add" instruction is 210. At this moment, the program counter register PC contains the value 00100 and is about to increment, memory locations contain the following values:
Address Contents
01101 00110110
01100 01110100
01011 10111000
:
00110 01001100
00101 10101011
00100 01111000
Perform two fetch-execute cycles, present each step of the cycles and the contents of each special-purpose register at the beginning and at the end of each step of the cycles in binary. If you believe there is no information on the contents of a particular register, indicate it as [unknown] (e.g., MDR[unknown]). If overflow occurs, the MSB is stored in a single-bit flag register and not counted in Accumulator. Express the final contents of Accumulator in both binary and decimal. For your answer, use the following table (two first lines are given as sample):
Step PC MAR MDR IR A PCMAR beginning 00101 [unknown] [unknown] [unknown] [unknown] end 00101 00101 [unknown] [unknown] [unknown]Explanation / Answer
For Load Accumulator instruction opcode is 510 and for Add instruction it is 210
PC's value is 00100
we observe address contents it is the last one...... now pc is ready to increment and is going to next address i.e., 00101 10101011
MAR(Memory Address Register) contains adress of the instruction to be fetched and MAR to memory and memory to MDR.
MDR strores the instruction and given to IR......
Accumulator used for short-term, intermediate storage of arithmetic and logic data in a computer's CPU......
PC contains 00101 and MAR contians no data at the beginning
after first cycle PC contents are copied to MAR means MAR contains 00101
MAR's address is given to memory and data is copied to MDR and MDR to IR.....
at the end after completing the instruction execution MDR and IR conatains no data at all.
step pc MAR MDR IR A
beginning PC----> MAR 00101 un un un un
MAR----> memory 00101 00101 un un un
memory----->MDR 00101 00101 un un un
MDR------->IR 00101 00101 data@00101 un un
IR execution 00101 00101 data@00101 data@00101 un
next instruction fetch then pc will increment to next address.......
In this example we are using 8 bit system the accumulator is also 8 bit......
AC stores the address 00101000 at the beginning
it's decimal values is (40)10......