Consider a virtual memory system with 24-bit virtual byte addresses and a physic
ID: 3858233 • Letter: C
Question
Consider a virtual memory system with 24-bit virtual byte addresses and a physical memory of 64Kbytes. Each memory page consists of 4Kbytes. Answer the following questions.
(a) Determine the size of each page table entry in bits assuming that each entry contains a valid bit, a dirty bit and a use bit, in addition to physical page number.
(b) How many entries does such page table must have to span the complete virtual space? Does the physical memory have enough capacity to store the page table?
(c) Assume the virtual memory system is implemented with a 4-way set-associative TLB with a total of 16 TLB entries. Determine the size of each entry of the TLB. Make sure to label the width of all fields.
Explanation / Answer
Solution:
a) To Find the Size of each Page Table entry
Step 1: Calculate Page offset
Here Physical Address = 16 bits , Virtual Address = 24 bit
Page Size = 12 bits
Page offset = 12 bit ( page offset is log2(page size))
Step 2: Frame Number = Physical Address - Page offset
=> 16-12
=> 4 bits
size of page table entry = valid bit + dirty bit+ use bit + Frame number
=> 7 bits
(b) we need the number of page entries in the page table to span complete virtual space. We can get this by subtracting page offset from the total number of bits we have for the virtual page number; that is, 24 - 12 = 12 i.e. we need 2^12 entries to represent the full range of the virtual addresses.
Page table size = 2^12 x 7 which is less than 64 kB so Yes physical memory have enough capacity to store the page table
(c) Given NO of entries in TLB = 16 and 4 way set associative
So, No of sets in TLB = 16/ 4 = 4 = 2^2
So, we can say 2 bits of virtual page no. is used to select the set
Each entry needs to contain a valid bit, a change (dirty) bit, the Frame No of the page, and the Page No minus the number of bits used to select the set in the TLB
Each page table entry is of
12-2+12+3 = 25 bits