Memory in a computer system is access in either \"sequential accesses\" or \"ran
ID: 3868498 • Letter: M
Question
Memory in a computer system is access in either "sequential accesses" or "random accesses". Sequential accesses are the memory accesses that make memory access requests to consecutive addresses. For example, after the memory address X is accessed by the processor, some consecutive addresses, X+1, X+2, X+3, and X+4, while random accesses are the memory accesses that make non-contiguous addresses. Is pipeline memory access effective in reducing memory access latency for sequential accesses and random accesses? Is memory-interleaving effective in reducing memory access latency for sequential accesses and random accesses? Answer the questions by completing the following table. Justify your solutions.Explanation / Answer
·Array a[] starts at address 0x00000000 and arrays are allocated contiguously. The assembly code always fetches b before a on a given iteration. ·It just so happens that all physical addresses for data map identically to their virtual address (address translation is still performed, but for arrays a, b, and c their physical and virtual addresses just happen to be identical to simplify solving this problem) ·The machine starts with invalidated/“cold” caches and a “cold”/invalid data TLB ·Writing all modified data from the L2 cache to main memory is performed after the code runs, and is included in all answers to questions ·Only data cache behavior is considered (ignore instruction fetching) ·Caches are blocking, with no prefetching of data